| 8:00AM-9:00AM |
Breakfast/registration
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| 9:00AM-11:00AM |
Tutorial 1: Memory technology
Chair: Suresh Rajgopal |
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Memory: Feeding AI’s voracious hunger for data
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Jim Handy, Objective Analysis |
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Evolving memory architectures for AI
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Raghu Sreeramaneni, Micron |
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HBM Base Die: How will HBM evolve in the future by utilizing the logic process?
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Sangwook Han, Samsung |
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Advanced packaging for High Bandwidth Memory (HBM)
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Jaesik Lee, SK Hynix |
| 11:00AM-11:30AM |
Break
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| 11:30AM-12:30PM |
Tutorial 1: Memory technology (cont)
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3D DRAM based Accelerator for Generative Inference
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Sudeep Bhoja (D-Matrix) & Aayush Ankit (Meta) |
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HBF in AI Compute - A System Architect’s view
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Anurag Agrawal & Radhakrishna Giduthuri, Oxmiq Labs |
| 12:30PM-1:45PM |
Lunch
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| 1:45PM-3:15PM |
Tutorial 2: RISC-V
Chair: Marcel Tromp |
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Update on RISC-V standards and adoption, including profiles and platforms
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Krste Asanovic, SiFive |
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Evolution of enterprise open-source on RISC-V and architectural convergence on RVA23
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Gordan Markus, Canonical |
| 3:15PM-3:45PM |
Break
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| 3:45PM-5:00PM |
Tutorial 2: RISC-V (cont)
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RISC-V profile and platform for interoperability with NVIDIA GPUs
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Frans Sijstermans, NVIDIA |
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RISC-V for automotive: opportunities and challenges
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Thomas Roecker, Infineon |
| 5:00PM-7:00PM |
Reception
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