| Alberto Gonzalez Trejo |
Senior CPU/SoC Engineer at the Barcelona Supercomputing Center and PhD Candidate at Universitat Politècnica de Catalunya |
| Ailsa Sun |
Hi! I’m a Math + CS major at UC Berkeley interested in hardware security, formal verification, and hw-sw codesign. I love seals, thai tea, and japanese literary fiction. |
| Anish Govind |
Recent M.S. Computer Engineering graduate from UC San Diego. |
| Annika |
EE undergraduate at the University of Waterloo with interests in chips, computer architecture, and low-level systems, and experience in embedded firmware and post-silicon validation. Currently exploring accelerators, HW/SW co-design, and efficient compute architectures. |
| Ansh Maroo |
3rd year undergrad in EECS at UC Berkeley. Interested in processor microarchitecture, simulation, and workload analysis |
| Arda Caliskan |
Third year PhD student in Computer Engineering at USC, researching superconducting electronics. I enjoy running, movies, and backpacking. |
| Carlos Gewehr |
I am a PhD candidate at Carnegie Mellon University, where I have lead multiple tapeouts during my time there. My research interests are in hardware accelerators for cryptography algorithms and computer architecture in general. I have worked full-time in industry as a Digital Design Engineer at EnSilica and have interned in the Architecture and Physical Design teams at Tenstorrent and NVIDIA, respectively. |
| Christopher Sepka |
ASIC Design Engineer currently pursuing a Master’s degree in Electrical Engineering. I have experience in RTL design and verification, ASIC architecture optimization, RISC-V, AXI, and UVM, along with prior work in AI-enabled hardware systems. Interested in computer architecture and digital IC design, and open to opportunities in ASIC/SoC design and verification. |
| Connor Lu |
I’m a 3rd year studying EECS at UC Berkeley. Interested in VLSI, computer architecture, and tooling/methodology. |
| Danny Lam |
M.S. student at UC Berkeley interested in AMS, RFIC, high speed wireless, and high speed wireline. Feel free to reach out at dannylam@berkeley.edu |
| Francisco Gutierrez |
Recent M.S. Computer Engineering graduate from UCSD. HPC, parallel programming, and GPU programmer. Experience in management and system administration of supercomputers at the San Diego Supercomputing Center. |
| Hibiki Watanabe |
I’m a 2nd year graduate student at Tokyo University of Agriculture and Technology majoring in silicon photonics, interning at Tenstorrent (RISC-V CPU, RTL design for memory management unit, etc.) |
| Bella Longhi |
Recent UC Berkeley CS graduate, incoming MS in CE at Columbia. Interested in SOC, VLSI, and FV. |
| Anthony Shen |
3rd year undegrad in ChemE and CS at Princeton. Interested in HPC, parallel processing, and ML for scientific computing, specifically quantum-chemistry algorithms. |
| Joe Samuel Rosh |
Hello! I’m a recent grad in CS&E from UC Merced, interned at Intel on memory validation. Since then I’ve been learning about RISC-V CPU design and memory-access simulation for AI inference. Grew up in Barcelona and love watching football, playing harmonium, and hiking. Happy to talk chips, AI hardware, or any opportunities out there! |
| Justin Yang |
|
| Karina Lelaisromant |
I recently graduated with a degree in Cybersecurity and Network Administration. I’m excited to begin my career in this field, apply my technical skills, and continue learning and growing professionally. |
| Karlo Gregorio |
Hello! I am an MSEE student at SJSU doing research on heterogeneous systems. My interests are in computer architecture and interconnect technology. During my free time, I enjoy going hiking, shrimp tanks, and playing games with my friends. |
| Kevin Gubbi |
Kevin Immanuel Gubbi has a Ph.D. in Electrical and Computer Engineering at UC Davis focusing on hardware security, Applied Machine Learning, and EDA. He has industry experience at Samsung Austin Research Center (SARC/ACL) developing a reinforcement learning–based chip design optimization framework, and at AMD on power side-channel attack mitigation. His work bridges academic research and industry to advance secure and efficient semiconductor design. |
| Khai Vu |
Recent M.S Computer Engineering graduate from UC Davis. Experience in gpu acceleration, HPC, digital logic simulation, and tensor algorithms. |
| Marco Ferroni |
I’m an EE Master’s student at ETH Zurich, currently completing my Master’s thesis at Stanford University. I’m very passionate about Circuit Design and Physical Design, with both academic and industry experience. I’m currently close to graduation and seeking opportunities in these fields. |
| Nikhil Rout |
Hello! I’m a Visiting RA at UCLA currently working on a Tensor Core Unit Extension to the open-source RISC-V based Vortex GPGPU. My research interests lie in making GPUs go Brrr (efficiently!). Looking for PhD lab openings starting Fall 2027 in GPU microarchitecture, low-precision arithmetic, and MLSys more broadly. https://nikhilrout.github.io |
| Riku Ando |
Master’s student at The University of Tokyo and Digital Design Intern at Tenstorrent. Obsessed with high-performance CPU architectures, RISC-V core design, and RTL engineering. Previously won the Best Poster Award at RISC-V Day Tokyo for custom vector acceleration. Eager to talk all things processors and silicon at Hot Chips! |
| Roshan Parekh |
I’m a CS & Math major at UC Berkeley, and I’m interested in all things computer hardware. |
| Saksham Adhikari |
I am an undergrad at TXST studying Computer Information Systems. I work as an Inference Engineer in an Austin based startup focusing on HPC and runtime optimizations. I designed and modeled our parallelism/partitioning scheme, making several performance improvements over the state of the art, and guiding the hardware design for custom video ASICs. Looking for full time opportunities in ML/ Infra, Systems starting 2027. |
| Sohan |
Hi! I am an MSEE student at the Illinois Institute of Technology, specializing in Computer and Microelectronics. I love solving hardware design problems using RTL design and am also passionate about computer architecture. In my free time, I enjoy listening to music or watching movies. |
| Yash Kodali |
I am a recent grad in EECS from UC Berkeley. I love to explore computer architecture, performance modeling, HW-SW codesign, and VLSI as a whole. |
| Changyang Zeng |
I am a third year PhD student at UC Santa Cruz working in hardware formal verification with theorem prover specically. I use formal verification to explore PPA optimization on all the levels. |
| Ruhi Yusuf |
I’m a third-year Electrical Engineering student at the University of Michigan who loves working at the intersection of photonics and hardware. My experience spans silicon photonics, embedded laser control, and SiN microresonators, and I’m always excited to learn how new devices make it from the lab into real systems |
| Andy Yin |
Hi! I’m a recent grad from Berkeley EECS, focusing on RTL design and verification, computer architecture, and how agentic workflows can be utilized to accelerate and enhance chip design cycles while improving performance, trust and security. |